What is Digital Signal Processor : Working & Its Applications

The processor is a simple chip or logic circuit that responds to basic instructions as well as input processes to control the processing unit. The processor is an essential component in electronic systems like smartphones, embedded systems, laptops, computers, etc. The two essential components of a processor are ALU and the control unit. There are different types of processors available in the market which is used based on the requirement like microcontroller, microprocessor, digital signal processor, embedded processor, etc. So this article discusses one of the types of processors namely digital signal processors.

What is a Digital Signal Processor?

Digital signal processor definition is, a digital signal processor is a special type of microprocessor which is fabricated on metal oxide semiconductor integrated circuits. DSPs are extensively used in different applications like digital image processing, telecommunications, audio signal processing, speech recognition systems, sonar, radar, etc, and also used in consumer electronics like mobile phones, HDTV (high-definition television) products, disk drives, etc.

Digital Signal Processor
Digital Signal Processor

How Does Digital Signal Processor Work?

The digital signal processor mainly works by using real-world signals like audio, voice, temperature, and video, digitizing them & after that mathematically manipulating them. A DSP performs different mathematical functions very quickly like add, subtract, multiply & divide.

A digital signal processor includes main components like program memory, data memory, compute engine, and Input/Output.

  • Program memory is used to store the programs to process data.
  • Data Memory is used to store the data to be processed.
  • Compute engine executes the mathematical operations, access the data from the data memory & program from the program memory.
  • Input/Output serves different functions to connect to the external world.

Digital Signal Processor Block Diagram

The block diagram of the digital signal processor is shown below.

Block Diagram of Digital Signal Processor
Block Diagram of Digital Signal Processor
  • In the above block diagram, a microphone is used as a transducer which changes the sound signal into an electrical signal.
  • After that, an analog electrical signal which is generated from a microphone is given to an op-amp to condition the analog signal.
  • An anti-aliasing filter is an LPF (low pass filter) that is located on the input of an ADC. This filter is used to band-limit wideband signals.
  • After that, a simple ADC converter unit uses analog signals & outputs as binary digits streams.
  • In this block diagram, the DSP is the heart of the system. At present, CMOS ICs are used to make DSPs that have high data throughputs, dedicated instruction sets & high speed.
  • After that DAC converts digital to an analog signal. The smoothing filter is another LPF used to smoothen the output by eliminating unnecessary high-frequency components.
  • Here, a speaker is the output transducer. So you can utilize anything else based on your requirements.

Features

The features of digital signal processing include the following.

  • Digital signal processors are mainly designed for supporting repetitive and numerically intensive tasks.
  • Most digital signal processors include a powerful data path and also the capacity to move large amounts of data to memory quickly.
  • These processors provide unique instruction sets to develop the efficiency of hardware.
  • The two significant features of digital signal processors are; the data path including multiple-access memory architectures & fast multiply-accumulate units.
  • Pipelining is frequently used to enhance the processor’s performance. So at present, most processors use pipelining but in the development of enhancing performance, pipelining will make programming very hard.

Characteristics

The characteristics of a digital signal processor include the following.

  • DSPs can provide the best performance.
  • The memory which is used to store a program is different as compared to memory used to store data.
  • DSPs don’t provide multitasking supported hardware
  • Special instructions are there for modulo & reversed bit addressing.
  • This processor can be used as a DMA (direct memory access) device in the host or supporting situations.
  • DSPs include specially designed architecture to fetch multiple data.
  • Generally, the DSPs include architecture to optimize different features like the following.
  • Special hardware is used to carry looping at less cost.
  • The multipliers or accumulators that are available are extremely parallel.
  • A unit handles floating numbers within the data flow path directly.
  • The calculations are usually carried out by a fixed point arithmetic process to speed them up.
  • Most of the registers present in computers today move the data to the lower-most bit if an overflow occurs. However, in digital signal processors, the overflow is retained at the maximum point itself.

Digital Signal Processor Architecture

The architectures of the digital signal processors are;

  • Von Neumann Architecture.
  • Harvard Architecture.
  • Super Harvard Architecture.

Von Neumann Architecture

Von Neumann’s architecture of a digital signal processor mainly includes a single memory & a single bus which are used for data transferring into & out of the CPU (central processing unit). Multiplying any two numbers needs at least 3 CLK cycles, where one CLK cycle is used to transmit each of the 3 numbers from the memory to the CPU with the help of the bus.

Von Neumann Architecture
Von Neumann Architecture

We don’t calculate the time taken to transmit the output back to memory, as we assume that it will stay within the central processing unit for extra manipulation. This type of architecture is quite suitable when you are satisfied to perform all of the necessary tasks in serial. At present, most computers use Von Neumann architecture but other architectures simply need where very fast processing is necessary.

Harvard Architecture

The name of Harvard Architecture is taken for the work finished at Harvard University in the year the 1940s under the Howard Aiken leadership. As shown in this design, it includes two separate memories for both the data & program instructions including separate buses for each. When the buses work independently, then data & program instructions can be fetched together to improve the speed over the single bus. At present, this dual bus architecture is used by DSPs.

Harvard Architecture
Harvard Architecture

Super Harvard Architecture

The super Harvard architecture of DSP is shown below. This name was coined through Analog Devices to explain the internal function of their new ADSP-211xx & ADSP-2106x families of DSPs which are called SHARC DSP which is a reduction of the longer term of Super Harvard Architecture.

Super Harvard Architecture
Super Harvard Architecture

This architecture was implemented by including some features to increase the throughput. While the super Harvard architecture digital signal processors are optimized in several methods, two areas are significant enough to be included like an instruction cache & an I/O controller.

Types of Digital Signal Processor

Digital signal processors are available in two types fixed-point processors and floating-point processors.

Fixed Point Digital Signal Processor

In a fixed-point digital signal processor, every number can be specified through a minimum of 16 bits, even though a different length can be utilized. The number can be represented with different patterns.
The fixed-point means that the fractional point position can be assumed to be fixed and to be identical for the operands as well as the operation result.

Fixed Point DSP
Fixed Point DSP

Fixed point processors are used in different flexible embedded applications because it uses low power and less cost. The fixed-point digital signal processor are; TI’s TM320C54x, ADI DSP BF53X, TM320C55x, TM320C64x, TM320C62x and Motorola MSC810x.

Floating Point Digital Signal Processor

Floating-point digital signal processors mainly use a minimum of 32 bits to store every value. The distinct feature of floating-point DSP is that the signified numbers are not spaced uniformly. Floating-point digital signal processors can simply process the fixed-point numbers, a requirement to implement counters & signals which are received from the analog to digital converter and transmitted to the digital to analog converter.

Floating Point DSP
Floating Point DSP

For both the operations of fixed-point and floating-point DSPs, SHARC DSPs are simply designed, optimized & executed with equivalent efficiency. As compared to fixed-point DSPs, the programs of floating-point DSPs are simple, however, they are normally very expensive and power consumption is also more. The types of floating-point DSPs are TI’s TMS320c67x and ADI ADSP 2116x/2126x.

Digital Signal Processor Instruction Sets

The TMS320F/C24x DSP assembly language instructions are discussed below. These instruction sets simply support numerically intensive signal-processing operations and general-purpose applications like high-speed control & multiprocessing. The instruction set of ’C24x is well-suited with the ’C2x instruction set because code written for the ’C2x is recollected to run on the ’C24x. The instruction set of TMS320F/C24x DSP is given below.

  • Accumulator, arithmetic & logic instructions.
  • Auxiliary register & data page pointer instructions.
  • TREG, PREG & multiply instructions.
  • Branch instructions.
  • Control instructions.
  • I/O & memory operations.

The arrangement of each instruction can be done alphabetically. Here, the no. of words that an instruction occupies within program memory and also the no. of cycles that instruction needs to perform are specified. All these instructions are assumed to be performed from internal data dual-access memory & internal program memory.

Accumulator, Arithmetic & Logic Instructions

The Accumulator, Arithmetic & Logic Instructions of TMS320F/C24x DSP are listed below with a description, the number of cycles, words, and opcode.

Mnemonic Description Cycles Words Opcode
ABS The absolute value of ACC 1 1 1011 1110 0000 0000
ADD Add to ACC with a shift of 0 to 15, direct or indirect 1 1 0010 SHFT IAAA AAAA
  Add to ACC with shift 0 to 15, long immediate 2 2 1011 1111 1001 SHFT

+ 1 word

  Add to ACC with a shift of 16, direct or indirect 1 1 0110 0001 IAAA AAAA
  Add to ACC, short immediate 1 1 1011 1000 IIII IIII
ADDC Add to ACC with carry, direct or indirect 1 1 0110 0000 IAAA AAAA
ADDS Add to low ACC with sign-extension suppressed,

direct or indirect

1 1 0110 0010 IAAA AAAA
ADDT Add to ACC with shift (0 to 15) specified by TREG,

direct or indirect

1 1 0110 0011 IAAA AAAA
AND AND ACC with data value, direct or indirect 1 1 0110 1110 IAAA AAAA
  AND with ACC with a shift of 0 to 15, long immediate 2 2 1011 1111 1011 SHFT + 1 word
  AND with ACC with a shift of 16, long immediate 2 2 1011 1110 1000 0001 + 1 word
CMPL Complement ACC 1 1 1011 1110 0000 0001
LACC Load ACC with a shift of 0 to 15, direct or indirect 1 1 0001 SHFT IAAA AAAA
  Load ACC with a shift of 0 to 15, long immediate 2 2 1011 1111 1000 SHFT

+ 1 word

  Load ACC with a shift of 16, direct or indirect 1 1 0110 1010 IAAA AAAA
LACL Load low word of ACC, direct or indirect 1 1 0110 1001 IAAA AAAA
  Load low word of ACC, short immediate 1 1 1011 1001 IIII IIII
LACT Load ACC with shift (0 to 15) specified by TREG,

direct or indirect

1 1 0110 1011 IAAA AAAA
NEG Negate ACC 1 1 1011 1110 0000 0010
NORM Normalize the contents of ACC, indirect 1 1 1010 0000 IAAA AAAA
OR ACC with data value, direct or indirect   1 0110 1101 IAAA AAAA
  OR with ACC with a shift of 0 to 15, long immediate 2 2 1011 1111 1100 SHFT

+ 1 word

  OR with ACC with the shift of 16, long immediate 2 2 1011 1110 1000 0010

+ 1 word

ROL Rotate ACC left 1 1 1011 1110 0000 1100
ROR Rotate ACC right 1 1 1011 1110 0000 1101
SACH Store high ACC with shift of 0 to 7,

direct or indirect

1 1 1001 1SHF IAAA AAAA
SACL Store low ACC with shift of 0 to 7,

direct or indirect

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